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1 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a description pericom semiconductors pi3hdmi series of switch circuits are targeted for high-resolution video networks that are based on dvi/hdmi? standards. te pi3hdmi2410-a is a 4-to-1 hdmi mux/demux signal switch. it is designed for low bit-to-bit skew and high channel-to-channel noise isolation. te maximum data rate support is up to 4.6gbps which can meet hdmi 1.3a stan- dard and support the resolution requirement of next generation hdtv and pc graphics of hdmi 1.4. pi3hdmi2410-a is designed specifcally for atc-sink require- ments. all switch control settings are through i 2 c bus to provide fexible design and reduce peripheral components. selectable ac- tive signal bufer for ddc bus can optimize the bi-directional data transmission for long trace or cable applications. all input pins are protected with pericoms esd protec- tion circuits supporting esd damage as high as 8kv contact per iec61000-4-2 level 4 specifcation. te ultra-low power operation of pi3hdmi2410-a meets the demand of low power consumption energy star? designs. features ? 4:1 hdmi switch mux/demux ? non-blocking eq path for ideal eq control in main receiver chipset ? -3db bandwidth up to 4.6gbps to support hdmi 1.3a (16- bit color depth per channel) ? hdmi 1.4 data rate ready ? ddc active signal bufer or passive switch selectable ? i 2 c register control for switch confguration ? automatic hdcp reset circuitry for quick communication when switching from one port to another ? connector plug-in detection and interrupt flag setting ? selectable hpd signal outputs with 5v open drain output stage or 3.3v output bufer ? 3.3v power supply and standby power supply ? tmds output enable control ? ultra-low power consumption to support energy star? compliance ? esd protection on all i/o pins 8 kv contact per iec61000-4-2, level 4 ? packaging (pb-free & green available): 8 0-contact lqfp 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol 10-0163
2 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol block diagram d[0:3] +a d[0:3] -a 4:1 mux d[0:3]+d d[0:3]-d scl_a sda_a scl_d sda_d selectable, ddc buffer or passive switch d+[0:3] d-[0:3] hpd_sink oe hpd programming 4:1 mux hpd[a:d] 100k 240k 240k 240k 240k control & status register i 2 c controller scl_ctl sda_ctl scl_sink sda_sink vsel 5v_porta 5v_portb 5v_portc 5v_portd ddc_wp[a:d] int_out 10-0163
3 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol pin assignment C 80-contact lqfp 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 d0+b d1-b d1+b d2-b d2+b d3-b d3+b d0-c d0+c d1-c d1+c d2-c d2+c d3-c d3+c d0-d d0+d d1-d d1+d d2-d 5v_porta 5v_portb 5v_portc 5v_portd sda_ctl scl_ctl d0- d0+ d1- d1+ v dd d2- d2+ d3- d3+ a0 a1 hpd_sink hpd_a hpd_b d2+d d3-d d3+d gnd v dd sda_a sda_b sda_c sda_d sda_sink sv dd scl_a scl_b scl_c scl_d gnd scl_sink hpd_d hpd_c gnd d0-b v dd d3+a d3-a d2+a d2-a v dd d1+a d1-a sv dd d0+a d0-a /oe vsel in_out gnd ddc_wpa ddc_wpb ddc_wpc ddc_wpd lqfp-80 10-0163
4 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol pinout table pinfname i/oftype description v dd power 3.3v power supply. when v dd is of, the tmds and ddc channels will be powered down. sv dd power 3.3v or 5v standby power supply. sv dd is for all side band signals (except dcc) and the i 2 c control register unit. gnd ground ground connection hpd_sink i sink side hot plug detector input with 100k? pull-down resistor to ground. hpd_a o port a hpd output hpd_b o port b hpd output hpd_c o port c hpd output hpd_d o port d hpd output d0+a d0-a d1+a d1-a d2+a d2-a d3+a d3-a i/o port a tmds input / output d0+b d0-b d1+b d1-b d2+b d2-b d3+b d3-b i/o port b tmds input / output d0+c d0-c d1+c d1-c d2+c d2-c d3+c d3-c i/o port c tmds input / output continuedf> 10-0163
5 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol pinfname i/oftype description d0+d d0-d d1+d d1-d d2+d d2-d d3+d d3-d i/o port d tmds input / output d0+ d0- d1+ d1- d2+ d2- d3+ d3- i/o sink side tmds input / output scl_a i/o port a ddc clock scl_b i/o port b ddc clock scl_c i/o port c ddc clock scl_d i/o port d ddc clock sda_a i/o port a ddc data sda_b i/o port b ddc data sda_c i/o port c ddc data sda_d i/o port d ddc data scl_sink i/o sink side ddc clock sda_sink i/o sink side ddc data scl_ctl i/o i 2 c clock sda_ctl i/o i 2 c data int_out o interrupt pin. logic status output pin of int fag. ddc_wpa, ddc_wpb, ddc_wpc, ddc_wpd, o open drain output. general purpose logic confgured by b0b[5]. oe i output enable control. active low. oe only disables the high-speed tmds channel but not the side band signals and i 2 c circuitry supplied by sv dd . continuedf> 10-0163
6 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol pinfname i/oftype description a1 i i 2 c address 1 a0 i i 2 c address 0 5v_porta, 5v_portb, 5v_portc, 5v_portd i connector 5v port. vsel i ddc bufer v il selection. vsel = 0v, v il = 0.5v (default value with 70k pull-down resistor) vsel = 0.5 v dd , v il =0.45v vsel = v dd , v il =0.6v i 2 c control register b7 (msb) b6 b5 b4 b3 b2 b1 b0 (r/w) address byte 1 0 1 0 1 a1 (w) a0 (w) 1/0 * * 0:write; 1:read truth table if hpd sink is used, b0b[4] = 0 port selection hpd input select hpd output select hpda hpdb hpdc hpdd port a hpd sink open drain hpd sink l l l port b hpd sink open drain l hpd sink l l port c hpd sink open drain l l hpd sink l port d hpd sink open drain l l l hpd sink port selection hpd input select hpd output select hpda hpdb hpdc hpdd port a hpd sink bufer hpd sink h h h port b hpd sink bufer h hpd sink h h port c hpd sink bufer h h hpd sink h port d hpd sink bufer h h h hpd sink 10-0163
7 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol data byte 0: control register f or register access, byte 0 and byte 1 are sequentially read or write together bit description type powerfupf condition logicfsettings 7 hdmi input port selection w 0 00 = port a 01 = port b 10 = port c 11 = port d 6 hdmi input port selection w 0 5 ddc_wp write protection setting w 0 0 = not active. ddc_wpa, ddc_wpb, ddc_wpc, and ddc_wpd pins are all set to hi-z 1 = write protection active ddc_wpa, ddc_wpb, ddc_wpc, and ddc_wpd pins are all set to logic low. 4 hpd input selection w 0 0 = hpd_sink when b1b[7] = 0 (open drain mode) hpd[a:d] logic = hpd_sink logic when b1b[7] = 1 (output bufer mode) hpd[a:d] logic = inverted hpd_sink logic 1 = i 2 c register setting from b0b[0:3] under i 2 c register control mode, hpd[a:d] can be individually controlled by b0b[0:3] for hpd output. 3 hpd port d logic setting r/w 0 i. byte0 b[4] = 1 when b1b[7] = 0 (open drain mode) b0b[3]=0, set hpd [d] to low b0b[3]=1, set hpd [d] to hi-z when b1b[7] = 1 (output bufer mode) b0b[3]=0, set hpd [d] to high b0b[3]=1, set hpd [d] to low ii. byte0 b[4] = 0 test mode continuedf> 10-0163
8 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol bit description type powerfupf condition logicfsettings 2 hpd port c logic setting r/w 0 i. byte0 b[4] = 1 when b1b[7] = 0 (open drain mode) b0b[2]=0, set hpd [c] to low b0b[2]=1, set hpd [c] to hi-z when b1b[7] = 1 (output bufer mode) b0b[2]=0, set hpd [c] to high b0b[2]=1, set hpd [c] to low ii. byte0 b[4] = 0 test mode 1 hpd port b logic setting r/w 0 i. byte0 b[4] = 1 when b1b[7] = 0 (open drain mode) b0b[1]=0, set hpd [b] to low b0b[1]=1, set hpd [b] to hi-z when b1b[7] = 1 (output bufer mode) b0b[1]=0, set hpd [b] to high b0b[1]=1, set hpd [b] to low ii. byte0 b[4] = 0 test mode 0 hpd port a logic setting r/w 0 i. byte0 b[4] = 1 when b1b[7] = 0 (open drain mode) b[0]=0, set hpd [a] to low b[0]=1, set hpd [a] to hi-z when b1b[7] = 1 (output bufer mode) b[0]=0, set hpd [a] to high b[0]=1, set hpd [a] to low. ii. byte0 b[4] = 0 test mode 10-0163
9 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol data byte 1: control register bit description type powerfupf condition logicfsettings 7 hpd output stage selection w 0 0 = open drain 1 = output bufer 6 tmds output enable w 1 0 = output disable disabled tmds channel and enter standby mode. side band signals and i 2 c circuitry are still alive. 1 = output enable 5 5v_portd connect r 0 0 = disconnected 1 = connected; int flag b1b[1] is set by 5v_portd edge signal when logic state changes from high to low or from low to high. 4 5v_portc connect r 0 0 = disconnected 1 = connected int flag b1b[1] is set by 5v_portc edge signal when logic state changes from high to low or from low to high 3 5v_portb connect r 0 0 = disconnected 1 = connected int flag b1b[1] is set by 5v_portb edge signal when logic state changes from high to low or from low to high. 2 5v_porta connect r 0 0 = disconnected 1 = connected int flag b1b[1] is set by 5v_porta edge signal when logic state changes from high to low or from low to high. 1 int flag rw 0 0 = int flag clear 1 = int flag set int flag will be set from logic low to high, when any 5v_port has detected plug or unplug transition action. int flag is cleared to low afer i 2 c bus reads the regis- ter byte 1. 0 ddc channel selection w 0 0 = passive switch 1 = active switch bufer for power saving operation, passive switch can be selected to further reduce the active power consumption. 10-0163
10 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol hpd output buffer hpd output buffer 300 k ohm weak pull-down note:f 1. d uring normal or standby mode, the hpd block is active. hpd signal output is programmed by the control register, b0b[0:4]. 2. o pen drain bufer is recommended with a 1k-ohm pull-up resistor to 5v. if hpd output bufer is selected, external bufer transistor is required to avoid 5v to 3.3v leakage. hpd output logic control byte 0 bit 4 selects the hpd signal input from hpd_sink pin or from internal control register b0b[0:3]. sv dd provides power supply to hpd block. svdd,f5vfstandbyfpower hpd b0b[4]=1,fhpdf=fi 2 cfregisterfsettingf b0b[3:0] b0b[4]=0,fhpdf=fhpd_sink of low (internal weak pull- down resistor to ground) low (internal weak pull- down resistor to ground) on control register setting hpd_sink (default=low) tmds channel pull-down resistor control pull-down resistor active conditions: 1. te data channel is unselected 2. output enable control oe is disable(oe=high) or b1b[6]=low, pull down on all channels 3. without normal operation supply vdd input (but standby voltage svdd is still on), pull down on all channels output enable control output enable or disable can be asserted through external oe pin or through i 2 c. oe oe_i2c b1b[6] operation low high enable low low disable high x disable *fdefaultfvalue:foef=flowf;fbytef1fb[6]f=fhigh 10-0163
11 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol dc specifications v dd = 3.3v 10%, ambient temperature -40 to +85c symbol parameter conditions min nom max units v dd operating voltage 3.0 3.3 3.6 v i dd supply current of v dd and sv dd output enable, sv dd = 3.3v 4 5.0 ma i ddq quiescent supply cur- rent of v dd and sv dd output disable, sv dd = 3.3v 1.0 2.0 i ddsb standby supply current sv dd = 3.3v, v dd = 0v 0.1 0.5 v oh_ddc ddc passive switch output high voltage v in = 3.3v external pull-up to vdd from 1.5k to 2k. v dd -1.0 v v ol_ddc ddc bufer output low voltage source side, external pull-up to v dd from 1.5k to 4.7k 0.4 sink side, i ol = 3ma 0.65 0.75 0.97 absolute maximum ratings (over operating free-air temperature range) item rating supply voltage to ground potential 5.5v all inputs and outputs -0.5v to v dd +0.5v ambient operating temperature -20 to +85c storage temperature -65 to +150c junction temperature 150c soldering temperature 260c stress beyond those listed under absolute maximum ratings may cause permanent damage to the device. recommended operation conditions parameterf min.f typ.f max.f unitf ambient operating temperature -40 +85 c power supply voltage (measured in respect to gnd) +3.0 +3.6 v 10-0163
12 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol symbol parameter conditions min nom max units v ih _5v_a , v ih _5v_b , v ih _5v_c , v ih _5v_d , input high voltage of 5v ports 2.4 v il _5v_a , v il _5v_b , v il _5v_c , v il _5v_d , input low voltage of 5v ports 0.8 v ol_hpd bufer output low voltage i ol = 4 ma 0.4 open drain output low voltage i ol = 4 ma 0 0.4 v oh_hpd bufer output high voltage i oh = 3 ma 2.4 i off (hpd) of leakage current v dd = 0v, v in = 3.6v 12 a v dd = 0v, v in = 5.5v 20 i oz _hpd open drain output leakage current v dd = 3.6v, v in = 3.6v 12 v dd = 3.6v, v in = 5.5v 21 v ol_ddc_wp open drain output low voltage 0.4 v c io 1 input/output capaci- tance (passive switch) v dd = 0v or 3.0v, frequency = 100khz 6 9 pf note: 1.fmeasuredfatfvbiasf=f0vforf5v,fvrmsf=f0.2v;fvbiasf=f1.65v,fvrmsf=f0.2v;fvbiasf=f2.5v,fvrmsf=f1.2v 10-0163
13 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol ddc channel block v dd = 3.3v 10%, ambient temperature -40 to +85c symbolf parameterf conditionsf min.f typ.f max.f unitf v oh passive (sink) sink side ddc passive switch output high voltage v in =3.3v. external pull-up rup to v dd from 1.5k to 2k v dd - 0.5 v v ih_ddc source side ddc bufer input high voltage 2 v v il_ddc source side ddc bufer input low voltage 0.4 v v ol_ddc1 sink side ddc bufer output low voltage, v sel = v dd external pull-up rup to v dd from 1.5k to 2k 0.7 0.9 v v il_ddc1 sink side ddc bufer input low voltage, v sel = v dd 0.62 v v ol_ddc2 sink side ddc bufer output low voltage, v sel = gnd external pull-up rup to v dd from 1.5k to 2k 0.7 0.9 v v il_ddc2 sink side ddc bufer input low voltage, v sel = gnd 0.5 v v ol_ddc3 sink side ddc bufer output low voltage, vsel = 0.5 v dd external pull-up to v dd from 1.5k to 2k 0.7 0.9 v v il_ddc3 sink side ddc bufer input low voltage, v sel = 0.5 v dd 0.46 v ddc channel application diagram tv controller rup rup 3.3v 3.3v scl_sink scl_a sda_a scl_d sda_d selectable ddc buffer or 4:1 sda_sink vsel 10-0163
14 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol dynamic specifications v dd = 3.3v 10%, t a -40 to +85c, gnd = 0v parameter description conditions min typ max units x talk crosstalk on high-speed channels f = 1.13 ghz -34 db f = 825 mhz -36 o irr off isolation on high-speed channels f = 1.13 ghz -36 f = 825 mhz -38 i loss deferential insertion loss on high-speed channels dr = 1.65gbps dr = 2.0gbps dr = 2.25gbps dr = 3.0gbps dr = 3.4gbps -1.5 -1.73 -1.82 -2.4 -2.7 db bw -3db bw for tmds channels 2.3 ghz capacitance measurement testfcondition capacitance units sda_ctl 3.0 pf scl_ctl 2.3 hpd_sink 1.7 10-0163
15 www.pericom.com ps-0.1 04/26/10 pi3hdmi2410-a 4-portfhdmi?fsignalfswitchfwithfi 2 cfcontrol packaging mechanical: 80-contact lqfp (ff) 1 description: 80-contact, low pro ? le quad flat package (lqfp) package code: ff (ff80) document control #: pd-2064 revision: a date: 03/18/09 07-0100 ordering information orderingfcode packagefcode packageftype pi3hdmi2410-ae 0 pb-freeffgreen,f0-contact,flp 1.ftermalfcharacteristicsfcanfbeffoundfonfthefcompanyfwebfsitefatfwww.pericom.com/packaging/ 2.fef=fpb-freefandfgreen 3.faddingfanfxfsufxf=ftape/reel pericom semiconductor corporation ? 1-800-435-2336 note: ? for latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php 10-0163

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